To introduce students into the world of digital design.
To discuss all aspects of design and implementation methods.
To give an understanding of the design issues in combinational logic circuits.
To give an understanding of the design issues in sequential logic circuits.
Prerequisite(s)
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Corequisite(s)
-
Special Requisite(s)
This course and its laboratory will be delivered in the 2023-24 Fall Term as a face to face Class.
Fundamental concepts covered in theoretical lectures will be implemented in the laboratory sessions. Hence, during the laboratory sessions, students will only apply the knowledge gained through the theoretical lectures and nothing new will be taught. In this respect, students are expected to master the concepts covered during the theoretical lectures before coming to the laboratory sessions.
Laboratory sessions are mainly dedicated to the simulation and testing of designed circuits. Unlike the introductory courses these time slots are not used for tutorials or guided teaching; they are reserved to assist you in your circuit design, simulation and testing efforts.
Laboratory worksheets will be posted at the course CATS site in advance, before laboratory sessions. Students are required to read and analyze them as soon as they are posted. Design and implementation work and familiarization with the simulation tools are expected to be carried out individually prior to laboratory sessions.
Course slides that are used in support of lecture sessions are posted regularly at the course CATS site. They should be exclusively used as study guidelines. For comprehensive coverage you are advised to refer to the course textbook, the references cited in the course syllabus.
Principle Sources
"Digital Design: With an Introduction to the Verilog HDL, VHDL, and SystemVerilog", Sixth Edition, Mano and Ciletti, Pearson, 2018.
Other Sources
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Course Schedules
Week
Contents
Learning Methods
1. Week
Introduction to the course
Oral presentation
2. Week
Binary Numbers, Number Base Conversion, Complements, Signed Numbers
Oral presentation
3. Week
Binary Codes, Introduction to Boolean Algebra - Lab1
Oral presentation, Laboratory
4. Week
Theorems & Properties of Boolean Algebra, Boolean Functions, Canonical and Standard Forms, Other Logic Operations - Lab 2
Oral presentation, Laboratory
5. Week
K-Maps, Simplification of Boolean Functions, Product of Sums Simplifications - Lab 3
Oral presentation, Laboratory
6. Week
Don’t-Care Conditions, NAND and NOR Implementations, Exclusive-OR - Lab 4
Oral presentation, Laboratory
7. Week
Analysis of Combinational Circuits, Design of Combinational Circuits, Binary Adders and Subtractors - Lab 5
Decoders, Encoders, Multiplexers, Introduction to Sequential Logic - Lab 8
Oral presentation, Laboratory
11. Week
Latches, Flip-Flops - Lab 9
Oral presentation, Laboratory
12. Week
Analysis of Sequential Circuits - Lab 10
Oral presentation, Laboratory
13. Week
Design of Sequential Circuits
Oral presentation
14. Week
Recapitulation
Oral presentation
15. Week
16. Week
17. Week
Assessments
Evaluation tools
Quantity
Weight(%)
Midterm(s)
1
30
Laboratory
10
20
Final Exam
1
50
Program Outcomes
PO-1
Adequate knowledge in mathematics, science and engineering subjects pertaining to the relevant discipline; ability to use theoretical and applied information in these areas to model and solve engineering problems.
PO-2
Ability to identify, formulate, and solve complex engineering problems; ability to select and apply proper analysis and modelling methods for this purpose.
PO-3
Ability to design a complex system, process, device or product under realistic constraints and conditions, in such a way so as to meet the desired result; ability to apply modern design methods for this purpose. (Realistic constraints and conditions may include factors such as economic and environmental issues, sustainability, manufacturability, ethics, health, safety issues, and social and political issues according to the nature of the design.)
PO-4
Ability to devise, select, and use modern techniques and tools needed for engineering practice; ability to employ information technologies effectively.
PO-5
Ability to design and conduct experiments, gather data, analyse and interpret results for investigating engineering problems.
PO-6
Ability to work efficiently in intra-disciplinary and multi-disciplinary teams; ability to work individually.
PO-7
Ability to communicate effectively, both orally and in writing; knowledge of a minimum of one foreign language.
PO-8
Recognition of the need for lifelong learning; ability to access information, to follow developments in science and technology, and to continue to educate him/herself.
PO-9
Awareness of professional and ethical responsibility.
PO-10
Information about business life practices such as project management, risk management, and change management; awareness of entrepreneurship, innovation, and sustainable development.
PO-11
Knowledge about contemporary issues and the global and societal effects of engineering practices on health, environment, and safety; awareness of the legal consequences of engineering solutions.
Learning Outcomes
LO-1
Will employ Boolean Algebra in logic circuits modelling.
LO-2
Will analyse Combinational Logic Circuits which include Small, Medium or Large Scale Integrated components, by using various methods.
LO-3
Will design Combinational Logic Circuits which include Small, Medium or Large Scale Integrated components, by using various methods.
LO-4
Will analyse Sequential Logic Circuits which include Small, Medium or Large Scale Integrated components, by using various methods.
LO-5
Will design Sequential Logic Circuits which include Small, Medium or Large Scale Integrated components, by using various methods.
LO-6
Will simulate combinational and sequential logic circuits by employing’ Proteus’ as a tools.
LO-7
Realize and practise various combinational and sequential logic circuits experiments in LAB.
